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Wednesday, October 12, 2011

Three terminal voltage regulators using IC 7805 and 7912

Three terminal voltage regulators using IC 7805 and 7912

Aim:   To verify the three terminal regulators using IC 7805 and 7912. 


1.      Voltage Regulator trainer kit
2.      Oscilloscope
3.      Digital multimeter
4.      Connecting patch chords

Circuit description:

The IC 723 is a monolithic integrated circuit voltage regulator featuring high ripple rejection, excellent input and load regulation, excellent temperature stability etc.,

It consists of a temperature compensating reference voltage amplifier, an error amplifier, 150mA output transistor and an adjustable output current limiter.
The basic low voltage regulator type 723 circuit is shown in fig (1). The unregulated input voltage is 24V and the regulated output voltage is from 0.2V to 7.3V by varying POTR. RSC (R1) is connected across current sense (CS) and current limit (CL) terminals to limit the accidental short circuit current.

A stabilizing capacitor (C1) of 100 pF is connected between frequency compensation terminal and inverting (INV) terminal. External NPN pass transistor is added to the basic 723-regulator circuit to increase its load current capability.

The output voltage can be regulated from 7 to 37 Volts for an input voltage range from 9.5 to 40Volts. For intermediate output voltages the following formula can be used

The resistor values  are calculated from potential divider network® .


1.      Connect the circuit diagram as shown in figure.
2.      Measure the output of the regulated power supply that is 0 to +40 and 0 to -40 V using digital multimeter.

Fixed voltage regulators 7805 (+5 V)

3.      Connect the circuit as shown in figure to observe the line regulation.

4.      By varying Vin supply in steps measure the corresponding output Vo and record in a tabulated form as shown below.

5.      Plot the graph between Vin, Vo and observe the line regulation.

7912 (-12 V)

6.      Connect the circuit as shown in below figure for line regulation.
7.      Repeat steps 4 and 5.



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