Google Search

Wednesday, October 12, 2011

STUDY OF LOGIC GATES



STUDY OF LOGIC GATES

AIM:  To study and verify the truth tables of OR, AND, NOT, NAND, NOR, EX-OR gates.  Realization of all the above gates using NAND and NOR gates.

APPARATUS REQUIRED:
1.      Logic gates trainer kit
2.      Regulated power supply
3.      Connecting wires.
4.      Patch cords.
THEORY:
OR gate:
The output of an OR assumes the 1 state if one or more inputs assume the 1 state.
If A=0, B=0 then output Y is zero. 
If A=0, B=1 then output Y is 1.
If A=1, B=0 then output Y is 1.
If both A and B are 1, then the output Y is 1.
Truth table:




Representation of OR gate: Y = A + B








AND gate:
The output of a AND assumes the 1 state when all the inputs assume the 1 state.
If A=0, B=0 then output Y is 0. 
If A=0, B=1 then output Y is 0.
If A=1, B=0 then output Y is 0.
If both A and B are 1, then the output Y is 1.
Truth table:






Representation of AND gate: Y = A.B




NOT gate:
The output of the NOT gate takes on the 1 state if and only if the output does not take on the 1 state.
If A=0 then output Y is 1. 
If A=1 then output Y is 0.
Truth table:




Representation of AND gate:



NAND gate:
The output of a NAND gate assumes the 0 state when all the inputs assume the 1 state.
If A=0, B=0 then output Y is 1. 
If A=0, B=1 then output Y is 1.
If A=1, B=0 then output Y is 1.
If both A and B are 1, then the output Y is 0.
Truth table:






Representation of NAND gate:




NOR gate:
A negation following an OR is called a NOR gate.  The output of a NOR gate assumes the 1 state when all the inputs assume the 0 state.
If A=0, B=0 then output Y is 1. 
If A=0, B=1 then output Y is 0.
If A=1, B=0 then output Y is 0.
If both A and B are 1, then the output Y is 0.
Truth table:





Representation of NOR gate:




EX-OR gate:
The output of a two input EX-OR assumes the 1 state if one and only one input assumes the 1 state.
If A=0, B=0 then output Y is 0. 
If A=0, B=1 then output Y is 1.
If A=1, B=0 then output Y is 1.
If both A and B are 1, then the output Y is 0.
Truth table:





Representation of EX-OR gate:




NOR and NAND as universal gates:
NOR and NAND are called universal gates as any logic combination can be realised by using NOR and NAND gates. 


Realization of OR, AND, NOT, NAND gates by NOR gates
OR gate:







AND gate:






NOT gate:











NAND gate:










Realization of OR, AND, NOT, NOR gates by NAND gates
OR gate:







AND gate:






NOT gate:











NOR gate:








Procedure:
  1. Connect the trainer as shown in figures.
  2. Verify the working of OR gate, AND gate, NOT gate, NAND gate and NOR gate with the help of truth tables given.

Result:

0 comments:

Post a Comment